期刊名称:Journal of Theoretical and Applied Information Technology
印刷版ISSN:1992-8645
电子版ISSN:1817-3195
出版年度:2017
卷号:95
期号:10
出版社:Journal of Theoretical and Applied
摘要:In present communication systems low power ADC�s along with high speed characteristics are the main building blocks. Present the implementation of these ADC architectures are in scaled VLSI technologies. This paper delineates the design of a third order single loop switched Capacitor sigma delta modulator designed of 45nm CMOS technology. The modulator designed is to reduce the power consumption in the low voltage field. The power consumption is dependent on the utilization of OTA. So the Gain enhancement OTA which has more power efficiency compare to two-stage OTA is opted. Simulation results shown are with 45nm CMOS technology with �1.2V supply voltage. To design Σ-Δ modulator TANNER EDA TOOL is used, the schematic is drafted using S-Edit, analysis of transient response have been done in T-Spice and waveforms are simulated in W-Edit