Programmable speed controller of AC servomotor using FPGA.

Kariyappa, B.S. ; Hariprasad, S.A. ; Nagaraj, R. 等

Introduction

The closed loop regulated pulse width modulated inverters have extensive application in many types of AC power conditioning systems such as uninterruptible power supply(UPS)[1], programmable AC source(PACS) and automatic voltage regulators(AVR).

Since PWM inverter place such an important role in converting DC voltage to AC voltage, the performance of an AC power conditioning system is highly dependent on closed loop control of the built in PWM inverter.

With successively improving reliability and performance of digital controllers, the digital control techniques have predominated over other analog counter parts.

The advantages of digital controllers are:

* Reconfigurability

* Power saving options

* Less external passive components

* Less sensitive to temperature variation

* High efficiency, because of the usage of efficient control algorithms.

Micro-processor based digital control schemes have been applied to the close loop regulation of PWM inverters. Micro-processor based control scheme[2] have the advantages of flexibility, higher reliability and lower cost, but the demanding control requirements of modern power conditioning systems will overload most general purpose micro-processors and the computing speed of microprocessor limits the use of microprocessor in complex algorithms.

Digital Signal Processors (DSPs) [3] and Microcontrollers [4] are used for digital control applications. But DSPs and Microcontrollers can no longer keep pace with the new generation of applications that require not just higher performance also more flexible without increasing cost and resources.

Further microprocessors, Microcontrollers and DSPs are sequential machines that mean tasks are executed sequentially which takes longer processing time to accomplish the same task.

The high speed hard wired logic can enhance the computation capability. The ASIC based technology provides a rapid and low cost solution for special applications with large market. Owing to the progress of technology, the life cycle of most modern electronic products become shorter than their design cycle. The emergence of FPGA has drawn much attention due to its shorter design cycle, lower cost and higher density. The simplicity and programmability of FPGA make it the most favorable choice for prototyping digital systems.

FPGA Based Control Scheme

Figure1 shows the proposed block diagram of the system. It mainly consists of keyboard, LCD, FPGA Controller, PWM Inverter, Motor and Feedback system.

[FIGURE 1 OMITTED]

Keyboard

The speed is entered through keyboard, it accepts 4 digit decimal number as speed. When key is pressed the input speed is calculated by taking the summation of first key number multiplied by 1000, second key number multiplied by 100, third key number by 10 and last key number by 1.

Liquid Crystal Display (LCD)

LCD is used to display entered speed and the actual speed of the motor.

FPGA Controller

FPGA Controller generates 50 Hz signal and 2 PWM signals in the rising edge and 2 PWM signals in the falling edge of 50 Hz signal. The duty cycles of these PWM are proportional to entered speed.

The FPGA controller also compares the entered speed and the motor speed from feed back. based on the error, duty cycle of the PWM signals are changed to minimize the difference. The Flowchart of the FPGA Controller is shown in figure2.

[FIGURE 2 OMITTED]

Buffer

Buffer provides electrical isolation between FPGA controller and PWM inverter. It also increases the input signal voltage to the required level.

PWM Inverter

PWM Inverter converts direct current (DC) to alternating current (AC). Figure2 shows the circuit of a full bridge Insulated Gate Bipolar Transistor (IGBT) based inverter with an LC output filter and load. The register 'rc' is the equivalent series register of the capacitor, while the register 'rl' is the equivalent series register of the inductor. According to the theory of state space averaging and circuit scheme shown in figure3, the linear model of PWM inverter is given by

[MATHEMATICAL EXPRESSION NOT REPRODUCIBLE IN ASCII.]

The four signals from the FPGA controller are applied to gate inputs of PWM inverter through buffer. The AC voltage is proportional to the duty cycle of the PWM gate signals. The speed of the motor depends on duty cycle at the PWM gate input.

The motor speed is sensed using IR sensor for each rotation one pulse is generated from IR sensor circuit. These pulses are used as a feedback to FPGA controller and these pulses are counted in FPGA controller for one second and multiplied by 60 to find the speed of the motor in rpm. If the entered speed and feedback speed are different then error is calculated and the duty cycle is varied as per the error.

[FIGURE 3 OMITTED]

Results and Conclusion

The controller is developed using VHDL. The written code is simulated using Modelsim[R] and this code is downloaded into XILINX SPARTAN 3 XC3S400 FPGA Board. The Waveforms for different duty cycles at the output of buffer after implementation are shown in figure 4 and the output waveforms with load for different duty cycles are shown in figure 5. The experimental setup is shown in figure 6.The 50 Hz signal is generated successfully and 0 to 100% duty cycle variation of PWM Inverter is controlled effectively. Table 1 shows the Speed of AC Servo Motor for different duty cycles.

[FIGURE 4 OMITTED]

[FIGURE 5 OMITTED]

[FIGURE 6 OMITTED]

References

[1] D.C. Griffith, Uninterruptible power supplies: power conditioners for critical equipment. New York, Marcel Dekker. 1989.

[2] B. N. Mwinyiwiwa, Z.Wolanski, and B. T. Ooi, "Microp- rocessor implemented SPWM for multiconverters with phase-shifted triangle carriers" IEEE-IAS Annu. Meeting, New Orleans, pp. 1542-1549, Oct. 1997.

[3] Kay soon low "A DSP-based Single-Phase AC Power source" IEEE trans on industrial electronics vol-46, no.-5,OCT-1999.

[4] Caurentiu Dimitriu, Mihai luconu, C Aghion, Ovidiu Ursaru "Control with microcontroller for PWM single phase inverter": IEEE 0-7803-7979-9/03 [c] 2003.

[5] Eric Monmasson and Marcian N cirstea "FPGA Design methology for industrial control systems- A Review", IEEE trans on industrial electronics vol-54, no.-4,AUG-2007.

[6] Mohammed .H. Rashid, Power electronics, 3rd edition, prentice hall of India, 2004

B.S. Kariyappa (1), S.A. Hariprasad (1) and Dr. R Nagaraj (2)

(1) Asst. Professor, ECE Department, R V College of Engineering, Bangalore-59, India

(2) Director, Center for Cognitive Technologies, RVCE Campus, Bangalore-59, India

E-mail: [email protected]

Table 1: Percentage duty cycle V/S Output Speed

% Duty cycle    15    25    35    45    55     65     75     85     95

Output         370   540   690   900   1098   1278   1488   1670   1850
Speed(RPM)