期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN:2320-9798
电子版ISSN:2320-9801
出版年度:2016
卷号:4
期号:3
页码:3759
DOI:10.15680/IJIRCCE.2016.0403188
出版社:S&S Publications
摘要:Simulation of Convolution encoder and Viterbi decoder is done with the help of Model Sim. RTL view and Schematic view is obtained after the synthesis using Xilinx ISE tool. Detailed a nalysis of power and memory utilization is obtained using Altera Quartus software. Finally the encoder and decoder is implemented using dual booting module on Spartan 3E FPGA kit. On changing the position of switch, the same board works as convolution enco der and viterbi decoder. The decoding technique used is soft decision Viterbi decoding and it provides better accuracy for the decoded information
关键词:Convolution encoder; Viterbi decoder; Simulation; Model Sim; Synthesis; Xilinx ISE tool; Dual booting module